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imx6 SPI - Master Mode with Wait States

Question asked by Vinicius Maciel on May 14, 2018
Latest reply on May 16, 2018 by igorpadykov



I did a little modification in spi-imx driver to insert 0 wait states in SCLK between data, but it is not working! I am using an imx6 wandboard board with kernel 4.9.11.

/* 0 wait states inserted */
reg = readl(spi_imx->base + MX51_ECSPI_PERIOD);
reg &= ~(MX51_ECSPI_PERIOD_MASK); // MASK=0x7FFF
writel(reg, spi_imx->base + MX51_ECSPI_PERIOD);

There is still a 2.2uS delay.