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Help with Flexbus example on TWR-K53N512

Question asked by Paul Santos on May 8, 2018
Latest reply on May 22, 2018 by Mark Butcher

Hi All,

 

I've been attempting to attach a 16-bit parallel TFT display to my TWR-K53N512 TWR board via the Flexbus and I've been having issues. First with my D/C line not getting set and cleared correctly; and now no activity on my AD[0]-[15] lines. I was hoping someone can point me in the right direction.

 

Some background notes:

  • I'm heavily using the application note "Using FlexBus Interface for Kinetis Microcontrollers" as a reference(pg 14 LCD).  Since this app note uses the K60, I've had to do some pin remapping for the k53.
  • The display I'm using is cfaf240320k024tts TFT Display, It pretty accurately functions the same as the one in the app note.
  • I'm using a USBee AX logic analyzer to probe lines
  • I've attached all relevant links at the end of the post
  • I'm using KDS v3.0
  • Since i'm using the TWR-K53N512 and KDS, I had to download The MK53DN512 SDK from mcuxpresso SDK Builder for register includes(Specifically #include <MK53D10.h>)
  • I've attached my code below
  • I haven't posted to the NXP fourms often so please feel free to let me know if I need to move the post to the appropriate area 

 

Questions:

  1. I can't get my D/C line(FB_ad[16]) to toggle when i'm trying to send a command vs data.
    1. Oddly enough after poking around I found a signal that looks like what it is supposed to be but it is on FB_AD[18] instead of FB_AD[16]. Why is this not on 16 or what is this signal?
  2. In general does anything look wrong in the code? I originally only had the issue with my D/C line, but now I can't get any activity on my AD[0]-[15] lines. I've attempted to revert back to a working version but I still can't get anything from them except a few 1-0 or 0-1 random transitions.
  3. How does setting CMSR0[BAM] define the block size?
    • In the example "Using FlexBus Interface for Kinetis Microcontrollers", They state that:
      • Setting the base address mask to 1 (CSMR0[BAM]) = 1) means that the block size for the CS is 2^n (n = number of bits in CSMR[BAM] + 16) must be 128 KB. This means address 0x60000000 to 0x6001FFFF can be accessed by the CS. Therefore address 0x6000000 (FB_AD16 is low) can be used to access the index register of the SSD1289, and address 0x60010000 (FB_AD16 is high) can be used to access the data buffer of the SSD1289.
      • So in this example: n = 1 + 16, so n^17 = 131072(round to 128KB) which makes sense.
      • However, Where are they getting this information? I can't find it listed anywhere in the reference manual. Is this the same for the K53?
  4. How do you set the system clock (or MCGOUTCLK)?
    • When Setting the Flexbus clock I understand that it has to be under 50MHz by design but also slower than my Clock cycle time on my display. In the case of my display it is 120ns, which means it has to be 32MHz or slower for it to write properly. I found that In order to get 32MHz, i need get the system clock at 96MHz and then set the following:
    • #define FLEX_CLK_INIT SIM_CLKDIV1_OUTDIV3(2)// FlexBus = Sysclk/3 pg314

      SIM->CLKDIV1 |= FLEX_CLK_INIT;
    • The problem is I'm sure exactly how to set MCGOUTCLK. I know i have to choose either the PLL or FLL and multiply an oscillator by a value but I'm a little lost on what registers i need to write to.
  5. For register FB_CSCR0[PS], What is the difference between between setting as 0x2 vs 0x3? They both seem to set 16-bit port sizes.
  6. Why does KDS force you to refrence registers via structure and not directly like below?
    • SIM_SOPT2 |= SIM_SOPT2_FBSL(3) 

 

Links:

 

Code:

#include <MK53D10.h>

void flexinit(void);
void vfnSendDataWord(unsigned short value);
void vfnSendCmdWord(unsigned short cmd);

#define ALT5 (PORT_PCR_MUX(5)|PORT_PCR_DSE_MASK) // Alternative function 5 = FB enable pg279
#define ALT1 (PORT_PCR_MUX(1)|PORT_PCR_DSE_MASK) // Alternative function 1 = GPIO pg279
#define FLEX_CLK_INIT SIM_CLKDIV1_OUTDIV3(3)// FlexBus = Sysclk/2 pg314
//#define FLEX_CLK_INIT (SIM_CLKDIV1 |=CLKDIV1 SIM_CLKDIV1_OUTDIV3(1))// FlexBus = Sysclk/2 pg314

void flexinit(void){
     //SIM_SCGC5 System clock gating control Register 5 pg.309
     //Enables clocks for all ports
     SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
     SIM->CLKDIV1 |= FLEX_CLK_INIT;


/*     These are the K60 pinouts
*      PORTC_PCR9=ALT5;
     PORTC_PCR10=ALT5;
     PORTC_PCR11=ALT5;
     PORTD_PCR1=ALT5;
     PORTD_PCR2=ALT5;
     PORTD_PCR3=ALT5;
     PORTD_PCR4=ALT5;
     PORTD_PCR5=ALT5;
     PORTD_PCR6=ALT5;
     PORTB_PCR17=ALT5;
     PORTB_PCR18=ALT5;
     PORTC_PCR0=ALT5;
     PORTC_PCR1=ALT5;
     PORTC_PCR2=ALT5;
     PORTC_PCR3=ALT5;
     PORTC_PCR4=ALT5;
     PORTC_PCR5=ALT5;
     PORTC_PCR6=ALT5;
     PORTC_PCR7=ALT5;
     PORTC_PCR8=ALT5; */


     //Change them to TWR-K53 Pinouts
     //Data Lines
     PORTA->PCR[10]=ALT5;     //EBI_AD15
     PORTA->PCR[24]=ALT5;     //EBI_AD14
     PORTA->PCR[25]=ALT5;     //EBI_AD13
     PORTA->PCR[26]=ALT5;     //EBI_AD12
     PORTA->PCR[27]=ALT5;     //EBI_AD11
     PORTA->PCR[28]=ALT5;     //EBI_AD10
     PORTD->PCR[10]=ALT5;     //EBI_AD9
     PORTD->PCR[11]=ALT5;     //EBI_AD8
     PORTD->PCR[12]=ALT5;     //EBI_AD7
     PORTD->PCR[13]=ALT5;     //EBI_AD6
     PORTD->PCR[14]=ALT5;     //EBI_AD5
     PORTE->PCR[8]=ALT5;          //EBI_AD4
     PORTE->PCR[9]=ALT5;          //EBI_AD3
     PORTE->PCR[10]=ALT5;     //EBI_AD2
     PORTE->PCR[11]=ALT5;     //EBI_AD1
     PORTE->PCR[12]=ALT5;     //EBI_AD0
     //Control Lines
     PORTA->PCR[6]=ALT5;          //CLKOUT0
     PORTD->PCR[15]=ALT5;     //EBI_R/W
     PORTE->PCR[7]=ALT5;          //EBI_CS0_B
     PORTA->PCR[9]=ALT5;          //EBI_AD16
     //Reset pin not on FB
     PORTD->PCR[4]=ALT1;          //Set as GPIO
     GPIOD->PDDR = 0x10;          //Set as output

     //SIM_SOPT2 is the System Options Register 2 Pg 292
     //Flexbus security level set to 11; off-chip instruction accesses and data accesses are allowed
     SIM->SOPT2 |= SIM_SOPT2_FBSL(3);
     //SIM_SCGC7 is the System clock gating control register 7 pg313
     //Sets the Flexbus clock to enabled
     SIM->SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;

     #define FLEX_DC_ADDRESS      0x60000000
     #define FLEX_BASE_ADDRESS      0x60010000
     #define FLEX_ADRESS_MASK      0x00010000
     FB->CS[0].CSAR = FLEX_DC_ADDRESS; // CS0 base address

     #define FLEX_CSMR_V_MASK FB_CSMR_V_MASK               //0x1U
     FB->CS[0].CSMR = FLEX_ADRESS_MASK | FB_CSMR_V_MASK; // The address range is set to 128K because the DC signal is connected on address wire

     // MUX mode + Wait States
     #define FLEX_CSCR_MUX_MASK (FB_CSCR_BLS_MASK)      //Sets the BLS to right-aligned (0x200U)
     #define FLEX_CSCR_AA_MASK FB_CSCR_AA_MASK          //Sets the AA to Enable           (0x100U)
     #define FLEX_CSCR_PS1_MASK (FB_CSCR_PS(2))          //Sets the Port Size to 16bit     (0x080U)  //(((uint32_t)(((uint32_t)(x)) << FB_CSCR_PS_SHIFT)) & FB_CSCR_PS_MASK)
     FB->CS[0].CSCR = FLEX_CSCR_MUX_MASK | FLEX_CSCR_AA_MASK | FLEX_CSCR_PS1_MASK; // FlexBus setup as fast as possible in multiplexed mode
}

void vfnSendDataWord(unsigned short value)
{
*((unsigned short*)FLEX_BASE_ADDRESS) = value;
}

void vfnSendCmdWord(unsigned short cmd)
{
*((unsigned short*)FLEX_DC_ADDRESS) = cmd;
}


int main(void) {
  /* Init board hardware. */
  //BOARD_InitPins();
  //BOARD_BootClockRUN();
  //BOARD_InitDebugConsole();
  flexinit();

  for(;;) { /* Infinite loop to avoid leaving the main function */
       //Check to see if each individual bit is working
       vfnSendCmdWord(0x0000);
       vfnSendDataWord(0x0001);
       vfnSendDataWord(0x0002);
       vfnSendDataWord(0x0004);
       vfnSendDataWord(0x0008);
       vfnSendDataWord(0x0010);
       vfnSendDataWord(0x0020);
       vfnSendDataWord(0x0040);
       vfnSendDataWord(0x0080);
       vfnSendDataWord(0x0100);
       vfnSendDataWord(0x0200);
       vfnSendDataWord(0x0400);
       vfnSendDataWord(0x0800);
       vfnSendDataWord(0x1000);
       vfnSendDataWord(0x2000);
       vfnSendDataWord(0x4000);
       vfnSendDataWord(0x8000);
    __asm("NOP"); /* something to use as a breakpoint stop while looping */
  }
}

 

Thanks for any help and time,

Paul

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