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Spread Spectrum Clocking(SSC) of i.MX6Q PCIe PHY

Question asked by torus1000 on May 7, 2018
Latest reply on Jun 5, 2019 by Andrea Greco



I have a couple of questions as following.


  • Does L4.1.15 BSP for MCIMX6Q-SDP support SSC?
  • Is SSC enabled after reset?
  • Is there any documents how to set following registers?
       PCIE_PHY_SS_PHASE      (5h)
       PCIE_PHY_SS_FREQ      (6h)
       PCIE_PHY_SSC_OVRD_IN  (13h)
       PCIE_PHY_SSC_ASIC_IN   (1Ah)


Can someone help me?