LPC11U68 running code from internal SRAM

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LPC11U68 running code from internal SRAM

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akhilesh_sreedh
Contributor III

Is it possible to move the application code stored in the flash of LPC11U68 to its 36kB SRAM block and execute the application program from the same. Any examples programs or document mentioning the same would be of great help.

Also is there any way by which the flash's code execution speed can be improved for this microcontroller. 

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Akhilesh, 

Please refer to the following community where it's explained how to move code from flash to RAM memory:

Relocating code from FLASH to RAM 

Hope it helps!

Victor.

 

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akhilesh_sreedh
Contributor III

Hello Victor, 

Thanks a lot for your reply. 

Actually we found the code execution speed of this microcontroller to be quite slow for our application and that is the reason why we are moving the code to RAM. Can anything be done to improve the code execution from flash as we don't want our RAM to be consumed much.

We verified the program execution speed by running the following code snippets inside the main and the core was set to 48MHz:

 

void main()
{
while(1)
 {
 Chip_GPIO_SetPinState(LPC_GPIO, 1, 13, FALSE);
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 Chip_GPIO_SetPinState(LPC_GPIO, 1, 13, TRUE);
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 }
}

The above code snippet produced a square waveform with an half cycle time of approximately 1.66us. 

We again ran the same code with 10 more NOPs added to every half cycle. The snippet is as shown below:

void main()
{
while(1)
 {
 Chip_GPIO_SetPinState(LPC_GPIO, 1, 13, FALSE);
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 Chip_GPIO_SetPinState(LPC_GPIO, 1, 13, TRUE);
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 __asm("NOP");
 }
}

This program produced a square wave on P1.13 with a half cycle period of 1.88us

The difference in time comes out to be around 220ns (execution time for 10 NOPs) and the per cycle execution of NOP comes to be around 22ns which fairly matches its theoretical value of 20.83ns. So, it appears that the code execution from flash takes significant time as per our needs. Is there any way by which the execution from the flash can be accelerated? 

Thanks in Advance,

Akhilesh Sreedharan.

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Akhilesh Sreedharan, 

Sorry for the late response. 

Is there any way by which the execution from the flash can be accelerated? 

Yes, I recommend you to check the user manual (UM10732.pdf) chapter 25: Flash Controller. In the table 354 you will see that you can change flash memory access time. 

pastedImage_4.png

You are running at 48MHz and it's taking 3 system clocks to access the flash. But if you slow down the system clock to 20MHz then you can set the FLASHTIM so it only takes 1 system clock to access the flash. Although the system clock will be running at a lower frequency, this will decrease the flash memory access time. 

Hope it helps!

Victor.

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shashank_garg
Contributor I

I am using the LPC 84x. I also want to confirm the same technical query. IN LPC 84x there is no such frequency depend wait cycle. Here in reference manual, the flash access time is:

LPC84x.jpg

As compared to LC11x, here in user manual, there is no wait cycle depend on frequency. Please confirm that whether I can have 1 system clock flash access time independent of frequency.

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Shashank Garg,

In the user manual section 6.4.1 before the table you posted you will find the following information: 

Access time to the flash memory can be configured independently of the system frequency by writing to the FLASHCFG register.

Regards,

Victor. 

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chrispflieger
Contributor IV

That won't actually make the access time too much faster. 2 cycles @ 40 MHz == 1 cycle @ 20 MHz.

As to the original question - the chip is as fast as it goes... get a faster chip if you need a faster chip (e.g. LPC15xx).

I'm not sure what you're trying to do, but running anything more than a small bit of code from SRAM is going to be a lot of work, since the code will likely have to be position independent (PIC). Plus, I think PIC tends to run slower because of all the addressing issues.

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