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How to enable L2 Cache of OCRAM in i.MX6Quad?

Question asked by M c on May 1, 2018
Latest reply on May 1, 2018 by M c

Hi Guys,

 

According to "47.4 Programmable Registers" of IMX6DQRM, we can enable L2 Cache of OCRAM by IOMUXC_GPR11. However,  I can not find the enable bits from IOMUXC_GPR11 in the reference manual . Can anyone give me some details?

 

Best wishes,

Mc

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