I'm tracing code of ADC_MPC5744P.
But i'm confusing about ADC_CLK.
At line 81,set ADL_CLK to 32MHz from divide PLL0_PHI by 5 (160 / 5 = 32)
But in ADC1_Calibration,
At line 30 , what is the comment mean bus clock? Is it at ADCD?
To my understanding ,bus clock maybe is the peripheral clocka(PBRIDFE0_CLK).
But it set to 40MHz in this sample.
So i really don't know the comment tell about bus clock(80MHz)...
If someone know about this, plz give me a hand ...
I'll appreciate for that.