I wrote (some parts were taken from an example from this site) a code that should take sampling using ADC. I made the ADC with singel converter each time that will be triggered by Hardware trigger using pit. after each sampling i fill an array with the results using DMA which is channeled to the ADC.
after sampling, using Port B6 interrupt, I initial DMA CH1 1 so that it will be always on and triggered by PIT CH1 in order to move the values in the Array to the DAC.
I'm adding the code to your convenience.
I got couple of problem (which I managed to solve with unwanted detours):
**all tests were made using DEBUG mode
1) With the ADC sampling- somehow when setting the PIT clock for the ADC HW trigger with short periode such as PIT_LDVAL0 = 0x000C350 (should be around 5ms) the DMA fills the first place in the array and then stops to to fill it, even though it's reaching out the DMA interrupt.
unwanted solve: set DMA_DSR_BCR0 = DMA_DSR_BCR_BCR(2048); instead of setting DMA_DSR_BCR0 = DMA_DSR_BCR_BCR(2); which means that it will not return to the CPU until it finish to move all 2048 bytes- fill all array. of course that when setting the long PIT periode it works even with DMA_DSR_BCR0 = DMA_DSR_BCR_BCR(2);
2) with DAC using DMA- I set PIT chanel 1 and DMA0 chanel 1 to trigger with the PIT. my problem that the DMA is delivering nothing to the DAC even though it's entering the DMA1 interrupt (which means that it's working fine with the PIT trigger). this time even if I set the PIT_LDVAL1 very large, it's doing the same.
unwanted solve: set a in problem 1 DMA_DSR_BCR1 = DMA_DSR_BCR_BCR(2048); instead of setting DMA_DSR_BCR1 = DMA_DSR_BCR_BCR(2); I really don't know what made it work this time, but with this I get a periodic signal in the output of Port E30 of the DAC.
another question: can you please address me to a place which I can learn how to set the clocks of the core, bus and et.