MPC5746C - No SPI Clock

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MPC5746C - No SPI Clock

1,006 Views
cholland
Contributor V

Hi,

So, I do have the SPI test working on a development board.

 

When I move to the prototype board, I am not able to see the SPI clock using a logic analyzer.

The SDO and CS signals seem to be working just fine. I just don't have a clock.

One problem I have is that the XTAL is not the same.

The prototype board is using a 16 MHz xtal.

I checked the clock going to the SPI module and it is setup for 16 MHz. Baud Clock that is.

(I just noticed the Clock Calculator value for Peripheral clock is fixed at 40.

I believe the  value should be =IF(H110="RESET",0,X7) Which would make the value 32.

 

pastedImage_1.png

Original

/* SPI_3.MCR.R = 0x80010001; */

/* DSPI_3.MODE.CTAR[0].R = 0x48021004; */ 

/* DSPI_3.MCR.B.HALT = 0x0; */

New

SPI_3.MCR.R = 0x80010001;

SPI_3.MODE.CTAR[0].R = 0x48001004;

SPI_3.MCR.B.HALT = 0x0;

Original calculated baud rate calculation (PBR : 2 = 5)(BR: 4 = 16)

* SCK baud rate = (fsys/PBR) * [(1+DBR)/BR]
* SCK baud rate = (40MHz/5) * [(1+0)/16]
* SCK baud rate = (8MHz)/16 = 500 KHz

New calculated baud rate calculation (PBR : 0 = 2) (BR : 4 = 16)

* SCK baud rate = (fsys/PBR) * [(1+DBR)/BR]
* SCK baud rate = (16MHz/2) * [(1+0)/16]
* SCK baud rate = (8MHz)/16 = 500 KHz

I do seem to be getting something when I set the baud rate to 

SPI_3.MODE.CTAR[0].R = 0x48031006;

It looks correct now, but not at the bit rate I was expecting.

I went back and tried to verify the baud rate from the development board.

Maybe I am missing something, but the calculated and measured baud rates don't seem to be the same.

Measured:
   * Clock period = 1000 nS = 1 uS = 1 MHz
   * That would be 1,000,000 bps

   * My frame is 10 bits.

   * 1,000,000 / 10 = 100,000 datums / sec
   

Original development board

pastedImage_3.png

Prototype board

pastedImage_7.png

Thanks for your help,

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2 Replies

637 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes, the SCK rate is given by formula

SCK baud rate = (fp /PBR) x [(1+DBR)/BR]

The fp is the SPI protocol clock, on the SPI_3 it is driven by F40 clock.

The F40 is derived from system clock and has fixed divider /4.

pastedImage_1.png

So it depends how do you config the system clock, usually it is running form PLL0, but you did not specify this.

Check the PLL and Mode Entry module setting.

BR, Petr

637 Views
cholland
Contributor V

Hi Petr,

Thanks for your help as always.

Sorry if I was not more specific in my question.

The FXOSC is 16 MHz. 

The FMPLL is setup for both FMPLL PHI0 and PHI1 to be 64 MHz.

The System Clock Selector is (2) FMPLL PHI0.

So then, F40 (my baud clock) would be 64/4 = 16 MHz.

Now, the new calculated baud rate calculation (PBR : 0 = 2) (BR : 4 = 16)

* SCK baud rate = (fsys/PBR) * [(1+DBR)/BR]
* SCK baud rate = (16MHz/2) * [(1+0)/16]
* SCK baud rate = (8MHz)/16 = 500 KHz

I thought that the calculation would work, but I don't get a baud rate clock at that frequency.

It is only when I slow the Baud Rate down that a baud rate clock starts to appear.

There must be some maximum baud rate that is dependent on the F40 Clock.

 

SPI_3.MODE.CTAR[0].R = 0x48031006;  (Maximum baud rate when using F40 = 16 MHz)

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