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workaround for e8052 (RMII)

Question asked by Eishi Shibusawa on Apr 15, 2018
Latest reply on Apr 19, 2018 by Yuri Muhin

Dear Sir

 

I want to ask the workaround for e8052.

It is described  at 12.3.0.2 Internal RMII reference clock in VYBRIDHDUG Rev.1.

I want to confirm the workaround based on "EXTERNAL CLOCK SOURCE" scheme.

 

Q1.

Can I select the CKO1 or CKO2 pin for the clock_Out pin(Fig42)?

 

Q2.

Are there any problem to select the PLL5 for clock source of the clock_Out(Fig42)?

 

Best Regards,

Eishi SHIBUSAWA,

 

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