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PWM configuration at Hz [S32K144]

Question asked by Electronica2 Powertrack on Apr 5, 2018
Latest reply on Apr 6, 2018 by Electronica2 Powertrack

Hi to the community,

 

I am trying  to configure a PWM output between 300 and 600 Hz (FTM0, channel 0), in order to get this goal i must introduce the higher possible number on MOD(16 bits) register to reduce frequency, but its maximum available value is 65535(2^16 - 1), reaching a frequency around 1 KHz.

 

Is it possible on S32K144 to get those frequencies?

 

 

I am using this code: 

 

void Edge_Align_PWM_Init() {

 

/* Enable clock for PORTD */

PCC->PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK;

/* Select and enable clock for FTM0 */

PCC->PCCn[PCC_FLEXTMR0_INDEX] = PCC_PCCn_PCS(6) | PCC_PCCn_CGC_MASK;

 

/* Set PORTD pins for FTM0 */

PORTD->PCR[15] = PORT_PCR_MUX(2); // FTM0, Channel0 

PORTD->PCR[16] = PORT_PCR_MUX(2); // FTM0, Channel1

PORTD->PCR[0] = PORT_PCR_MUX(2); // FTM0, Channel2

PORTD->PCR[1] = PORT_PCR_MUX(2); // FTM0, Channel3

/* Enable registers updating from write buffers */

FTM0->MODE = FTM_MODE_FTMEN_MASK;

 

/* Enable sync, combine mode and dead-time for pair channel n=1 and n=2 */

FTM0->COMBINE = 0x0u | FTM_COMBINE_COMP1_MASK | FTM_COMBINE_DTEN1_MASK;

 

/* Set Modulo in initialization stage (10kHz PWM frequency @112MHz system clock) */

FTM0->MOD = FTM_MOD_MOD(64000-1);//11200->10KHz

 

/* Set CNTIN in initialization stage */

FTM0->CNTIN = FTM_CNTIN_INIT(0);

 

/* Enable high-true pulses of PWM signals */

FTM0->CONTROLS[0].CnSC = FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK;

FTM0->CONTROLS[1].CnSC = FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK;

 

/* Set channel value in initialization stage */

FTM0->CONTROLS[0].CnV=FTM_CnV_VAL(32000); // 50% duty cycle 

FTM0->CONTROLS[1].CnV=FTM_CnV_VAL(32000); // 50% duty cycle 

 

/* Reset FTM counter */

FTM0->CNT = 0;

/* Insert deadtime (1us) */

FTM0->DEADTIME = FTM_DEADTIME_DTPS(3) | FTM_DEADTIME_DTVAL(7);// 3 y 7

 

/* Clock selection and enabling PWM generation */

FTM0->SC = FTM_SC_CLKS(1) | FTM_SC_PWMEN0_MASK | FTM_SC_PWMEN1_MASK | FTM_SC_PWMEN2_MASK | FTM_SC_PWMEN3_MASK;

}

 

Best regards,

Jorge

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