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Placing LPC4367's M0SUB core's code in other memory location

Question asked by Akhilesh Sreedharan on Apr 4, 2018
Latest reply on Apr 6, 2018 by Bernhard Fink



I would like to know if LPC4367's M0SUB core's program can be placed in any other internal memory location apart from the 16kB LOCAL SRAM which the LPCXpresso project creation wizard configures by default,  since our code for M0SUB doesn't fit into the 16 kB LOCAL SRAM.

Also, I would like to know if only M0SUB can be made to access code from an external flash using the SPIFI or a parallel NOR flash.


Any examples regarding both the queries would help me. 


Akhilesh Sreedharan