MC9S08QE Timer input capture wake from STOP

Discussion created by GARY OLMSTEAD on Apr 4, 2018

I have an MC9S08QE128 with a lot of interrupt driven inputs.  So many that I ran out of keyboard interrupt pins, and had to use some TMR1, TMR2 and TMR3 pins.  The project also has to draw very low power, so it spends most of its time in STOP3 mode. 


All the inputs and interrupts work perfectly when the processor is awake. 


The keyboard interrupts wake the processor from STOP mode as intended.  The timer interrupts don't do anything in STOP mode. The hardware signals on the pins are still working as in run mode.  I used CodeWarrior 10.6 and Processor Expert to set the registers up.  I have the IREFSTEN and IRCLKEN bits set, and EFRESTEN and ERCLKEN clear, so the internal oscillator should be running in STOP3 mode, but of course there isn't any way to verify that. 


In STOP mode, the ICSV1 registers are:

ICSC1 = 0x07  so it should be running on the internal oscillator

ICSC2 = 0x00   I don't think any of the rest of these apply to this situation, but here they are anyway.


ICSSC = 0x70

FTRIM = 0x00

TRIM = 0xA0


TPM_1 registers

TPM1SC = 0x8F timer overflow interrupt disabled; not center-aligned PWM; bus rate clock selected.

counter and counter modulo registers are don't cares

TPM1C0SC = 0x00 = not used

TPM1C1SC = 0x48 = input capture interrupts enabled on falling edge only

TPM1C2SC = 0x4C = input capture interrupts enabled on rising or falling edge


TPM2 and TPM3 are similar.  TPM3 also has an edge aligned PWM motor drive on Channels 2-5.


I've searched the errata for this device; nothing.  I am stumped.  Any suggestions would be appreciated.