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imx7 UART prints garbage during boot before M4 is loaded.

Question asked by Manuel Iglesias on Mar 25, 2018
Latest reply on Mar 26, 2018 by igorpadykov

Hi,

I have a pico imx7 board, normally cortex M4 debug console is on UART 6 defined in dts as 

 

 

pinctrl_uart6: uart6grp {
fsl,pins = <
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79
MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x79
MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x79
>;
};

 

&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
fsl,uart-has-rtscts;
status = "okay";
};

 

I have change the debug console to UART 2,  for this I have disable the LCD so I can use UART 2 function on some of the LCD pads, I have done this by adding to m4 dts the following

 

&lcdif {
status = "disabled";
};

 

In M4  I have include code for initialize UART 2 as debug console instead of UART6

 

IOMUXC_SW_MUX_CTL_PAD_LCD_CLK = IOMUXC_SW_MUX_CTL_PAD_LCD_CLK_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_ENABLE = IOMUXC_SW_MUX_CTL_PAD_LCD_ENABLE_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_HSYNC = IOMUXC_SW_MUX_CTL_PAD_LCD_HSYNC_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_VSYNC = IOMUXC_SW_MUX_CTL_PAD_LCD_VSYNC_MUX_MODE(4);

IOMUXC_SW_PAD_CTL_PAD_LCD_CLK = IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE = IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC = IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC = IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_DSE(1);

IOMUXC_UART2_RX_DATA_SELECT_INPUT = IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(0); // LCD_HSYNC Mode: ALT4 for UART2_RTS_B

 

It works, but  there is a moment during boot that the output become undefined and start printing garbage until M4 is loaded in memory and init the uart port, after that everything works, for example

 

wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww�
Hardware initialized UART2

 

This was not happening with uart6. 

 

How can I fix this in software? 

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