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D_INIT timeout issue in T1022

Question asked by ROSHAN SHARMA on Mar 21, 2018
Latest reply on Mar 24, 2018 by ufedor

We are using T1022 in one of our design. We are having issue in loading uboot in DDR4.
our case scenario is as per below:
We are using 100MHz differential clock as a input to processor at pin DIFF_SYSCLK and DIFF_SYSCLK_B. MEM_PLL_RAT field value in RCW word is 16:1 for DDR controller. We are using 4Gb DDR4 memory in our card. SPI Falsh is used as a bootup and RCW source.
DDR4 is detected via I2C bus, but after that boot up process hang up and we got print as per attachment.
RCW word is attached for your reference.
we have tried to reduce DDR4 working frequencies with lower DDR controller ratios such 6:1, 10:1, 11:1, 12:1, 13:1 but in those cases we got no prints at all, print are coming in case 16:1 ratio.
Any help on debugging will be appreciated.

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