My design using the K22 (MK22FN256VLL12) involves using an external clock running at 4 MHz. It's a resonator. I want to transition from FEI until PEE mode, which also involves the intermediate transition to FEE mode. It is basically described by example 1 in section 188.8.131.52, except my final MCGOUTCLK is 120 MHz.
My setup works well, but my worry is the requirement that in FEE and FEI modes, the FLL reference clock must be defined by scaling the input clock using FRDIV. When using 4 MHz, the only suitable value for FRDIV is 128, yielding 31.250 kHz. This is the absolute rock bottom end of the allowed range, and my worries is that with aging and slight temperature drift, the 4 MHz may have decreased by e.g. 2%, thus absolutely not meeting the requirement.
I couldn't find anywhere in the reference manual where this is mentioned, and the example also assumes that 4 MHz is used, as if there would never be any issue in doing so.
1) What would happen, if FLL decreases below 31.250 kHz?
2) If there is a problem, is the only solution to go with a higher freq oscillator, e.g. 4.19 MHz which seems to be very common?
If yes to 2), there's one more question:
3) The internal fast clock is also 4 MHz, with a 5% tolerance - what is the purpose of this, when it could potentially also result in an FLL frequency lower than 31.250 kHz?
Hopefully, I've missed something :-)
Thanks for any help.