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SRAM ECC Algorithm for MPC56xx

Question asked by Kadir Aktas on Mar 19, 2018
Latest reply on Mar 20, 2018 by Peter Vlna
Is ECC algorithm for SRAM , applied to whole memory region or just dedicated memory space for this test.
If they are applied to whole memory, how to manage data changes in SRAM? Variable changes are written with their new error bits?
If I change an area in SRAM during debug session, this change isn't perceived as ECC error by the microcontroller, Why? Especially, I need to know that, If there is one or more bit change(caused by radiation, electro-magnetic interference, or electrical noise) in any region of SRAM, will ecc detect this error?
In generally, how does ECC work?