MCF52233 / MCF52235 VSSPLL pin

[daverj]

I am confused. In the schematic that came with the M52235EVB the VSSPLL signal seems to be connected to bypass caps and the caps for the crystal, but has no path to the board ground.

In the 52235 datasheet it shows a typical connection with that pin tied to ground.

Which is correct? Is the schematic wrong for the EVB and the VSSPLL is really tied to ground (directly or via a ferrite bead?) Or is it really being used for connecting those caps to the chip and truely is not being connected to the board ground??

I'm trying to finish a PCB layout today and need this info ASAP.

Thanks.

[daverj]

No. On the MCF5223x parts the VDDPLL is for bypass only. It is not connected to VDD on the board. It is only connected to bypass caps that go between VDDPLL and VSSPLL (GND).

The same is true for several other VDD pins on that chip.

 You can see that in the datasheet. It says that VDD1, VDD2, PHY_VDDA, PHY_VDDTX, and PHY_VDDRX are all just connected to bypass caps and do not get connected to VDD on the board. They are connected to VDD internally in the chip.

VDDX1, VDDX2, and VDDR are connected to VDD on the board. VDDA is connected to the board's VDD via an inductor (or alternately a ferrite?). The rest of the VDD pins do not connect to VDD on the board. Only to bypass caps.


Message Edited by daverj on 2008-10-24 05:17 PM

[efk]

Understood.
Thank you for your answer.

[daverj]

OK, mystery solved.

 I contacted Freescale support and was able to get the gerbers for the M52235EVB board. They clearly show that the schematic for that board is incomplete and that in fact VSSPLL is tied directly to the ground plane on the other side of the VSSPLL pin as the caps are tied to.

I never had any doubts about the VDDPLL pin, which is clearly just for bypass caps on both the schematic and the data sheet.

 It was the VSSPLL pin that concerned me since some other EVBs for similar chips had it tied directly to GND, some others had it to GND via a ferrite bead, while the schematic for this EVB had it not connected to GND at all.

So mystery solved. For the 52235 (and 52233) VSSPLL gets tied directly to GND.

[efk]

That's clear for VSSPLL.

But regarding VDDPLL, the best is to link it to VDD via a 10µH ferrite ?
And to add 2 capacitors (1nF & 220nF) from VDDPLL to VSSPLL ?

Could you please confirm ?

PS: the reason of my question is my interface will be used in a very bad electrical environment, so i would like to have the best for the processor.



Message Edited by efk on 2008-10-24 03:43 PM

[mjbcswitzerland]

Hi

If you look at the diagram to the demo board (with M52233,) instead of the EVB you will find that it is there clearly connected to 0V (ground):
http://www.freescale.com/files/32bit/hardware_tools/schematics/M52233DEMO_SCH.pdf?WT_TYPE=Schematics...

The EVB diagram doesn't seem to show the connection (it may be there somewhere or else the CAD system automatically treated VSSPLL and 0V as connected) (?). It may also be connected internally (to the chip) so not need any board connection...

Certainly VDDPLL should NOT be connected to and power supply since the pin is only for decoupling purposes.

To be absolutely sure I would connect a 0R resistor to a quiet GND so that it can be removed if it not really necessary.

Regards

Mark

www.uTasker.com

[daverj]

I did look at the M52233DEMO schematic too, and it is not so clear that it is connected to ground. The ground symbol goes to a circle around the VSSPLL line rather than directly connecting to it. It isn't clear to me what that represents. Usually I see a circle like that meaning there is a shield around that line (or a guard band), and not a connection to that line.

In my layout I have placed a ferrite bead between the VSSPLL and GND on the board so I can stick that in or remove it as needed.  But I was really hoping to get feedback from Freescale or at least from somebody who has etched a board and to hear what they did on it.

It would be nice if Freescale made gerbers available for the board so I could see exactly what their etch has.

[mjbcswitzerland]

Hi

Looking again I do tend to agree that the symbol on the M52233DEMO board is probably a shield rather than a connection.

I also looked a bit more closely at some other devices to see if there was any cross-correlation. This didn't help greatly since it depends on the actual chip - M5213 and M5221x/M5222X have battery backup and there the VDDPLL is actually (or at least optionally) connected to 3V3.

Two interesting details that I found were:
- M52210 DEMO board has VDDPLL connected to 3V3 (via FB), but its VSSPLL is shielded as on the M52233DEMO (assuming it is really a shield).
- M52223EBV and  M5213EVB has optional VDDPLL (with jumper and FB), but their VSSPLL is connected to GND (although the symbol looks also quite similar to a shield - but smaller, and a connection between wires exists).
- In the M5213EVB change notes there was obviously a change with respect to the connecton:
http://www.freescale.com/files/32bit/doc/ref_manual/M5213EVB_CHANGES.pdf?fpsp=1
At some point an FB was removed in preference to a direct connection to GND under the chip.

There doesn't seem to be a real pattern and it may be that the best way to connect VSSPLL actually depends on other factors such as the particular board (ie. experiment)?

There are Gerber files available for the M5213 (although as seen above this doesn't mean a gread deal for the M5223X).

Regards

Mark

www.uTasker.com



Message Edited by mjbcswitzerland on 2008-10-22 10:15 PM

[efk]

In the datasheet, i read this "To improve noise immunity, the PLL, crystal oscillator, and relaxation oscillator have their own power supply inputs: VDDPLL and VSSPLL. All other circuits are powered by the normal supply pins, VDD and VSS." And this to "(VDD and VDDPLL = 2.7 to 3.6 V, VSS = VSSPLL = 0 V)".
So i think VDD and VSS are the correct links ; the lonely thing to care of is to make proper connections on the pcb, in order the PLL is not disturbed by the digital noise.

[mjbcswitzerland]

Remark:
efk's notes refer to the M5221x and not the M5223x, where the VDDPLL supply should not be connected, but rather only decoupled.

regards

Mark