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Cache L1 address retrieving and flush

Question asked by Quentin Reynard on Mar 13, 2018
Latest reply on Mar 19, 2018 by Quentin Reynard

Hi everyone,

 

I want to flush the L1 cache on my P2020 processor with the assembly instruction dcbf. In order to do that, I need to know where the cache L1 is (if I am not mistaken ?). But I don't find any L1 cache definition in my project and I was wondering if this is why I don't know the address or if this is kind of an automatic process made by the processor ?

 

Anyway, how can I retrieve the address of the L1 cache ?

 

Once retrieved, in order to flush it, I will do something like that:

code

                                                      # r1 = start of shared region
                                                      # r2 = end of region

loop:

dcbf       0,r1                                  # flush line at address r1
addi       r1,r1,<line size in bytes> # point to next line
cmpw    r1,r2                                 # finished?
ble         loop

 

Is it the rigth manner to proceed ?

 

Thank you a lot for your answers,

 

Regards,

 

Quentin Reynard

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