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Problems with remapping of CCSR (MPC8548)

Question asked by Timmo Hellemann on Oct 21, 2008
Latest reply on Oct 21, 2008 by Timmo Hellemann
Hello.
I'm trying to programm a bootloader for the MPC8548 but I have big problems with the MMU and remapping of the CCSR. After Reset the CCSR is located at 0xFF70_0000. So at first I init the TLB1 Entry 1 with the following:

    lis     %r6,FSL_BOOKE_MAS0(1, 1, 0)@h
    ori     %r6,%r6,FSL_BOOKE_MAS0(1, 1, 0)@l

    lis     %r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)@h
    ori     %r7,%r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)@l
   
    lis     %r8,FSL_BOOKE_MAS2(0xFF700000, MAS2_I)@h
    ori     %r8,%r8,FSL_BOOKE_MAS2(
0xFF700000, MAS2_I)@l

    lis     %r9,FSL_BOOKE_MAS3(
0xFF700000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
    ori     %r9,%r9,FSL_BOOKE_MAS3(
0xFF700000,0,(MAS3_SX|MAS3_SW|MAS3_SR))@l

    mtspr   MAS0,%r6
    mtspr   MAS1,%r7
    mtspr   MAS2,%r8
    mtspr   MAS3,%r9
    isync
    sync
    .long 0x7C0007A4    //tlbwe, compiler doesn't support this opcode


After that I can set some GPIOs so I can see that it works. Now I wanted to relocate the CCSR to 0xE000_0000. So I followed the Instructions of the Manual Page 4-4:

    lis        %r3,0xFF700000@h
    ori        %r3, %r3,
0xFF700000@l
   
    lwz        %r4,0(%r3)                    /* Read CCSRBAR */
    isync
    lis        %r4,(0xE0000000 >> 12)@h        /* New Address for CCSRBAR */
    ori        %r4, %r4, (
0xE0000000 >> 12)@l
    stw        %r4, 0(%r3)
    li         %r3, 0xFFFFF000@h             /* Read somewhere in ROM */
    ori        %r3, %r3, 0xFFFFF000@l
    lwz        %r4, 0(%r3)
    isync


    /* Update TLB1,1 for new Address */
    lis     %r6,FSL_BOOKE_MAS0(1, 1, 0)@h
    ori     %r6,%r6,FSL_BOOKE_MAS0(1, 1, 0)@l

    lis     %r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)@h
    ori     %r7,%r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)@l
   
    lis     %r8,FSL_BOOKE_MAS2(
0xE0000000 , MAS2_I)@h
    ori     %r8,%r8,FSL_BOOKE_MAS2(
0xE0000000 , MAS2_I)@l

    lis     %r9,FSL_BOOKE_MAS3(
0xE0000000,0,(MAS3_SX|MAS3_SW|MAS3_SR))@h
    ori     %r9,%r9,FSL_BOOKE_MAS3(
0xE0000000,0,MAS3_SX|MAS3_SW|MAS3_SR))@l

    mtspr   MAS0,%r6
    mtspr   MAS1,%r7
    mtspr   MAS2,%r8
    mtspr   MAS3,%r9
    isync
    sync
    .long 0x7C0007A4    //tlbwe


    /* Read the content of CCSRBAR from new Address */
    lis        %r3,
0xE0000000@h
    ori        %r3, %r3,
0xE0000000@l
    lwz        %r4,0(%r3)


After that I don't have any access to the CCSR. What am I doing wrong?

Advice:
FSL_BOOKE_MASX-Macros are from uboot 1.3.4:
#define FSL_BOOKE_MAS0(tlbsel,esel,nv) \
        (MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | MAS0_NV(nv))
#define FSL_BOOKE_MAS1(v,iprot,tid,ts,tsize) \
        ((((v) << 31) & MAS1_VALID)             |\
        (((iprot) << 30) & MAS1_IPROT)          |\
        (MAS1_TID(tid))                |\
        (((ts) << 12) & MAS1_TS)                |\
        (MAS1_TSIZE(tsize)))
#define FSL_BOOKE_MAS2(epn, wimge) \
        (((epn) & MAS3_RPN) | (wimge))
#define FSL_BOOKE_MAS3(rpn, user, perms) \
        (((rpn) & MAS3_RPN) | (user) | (perms))

I hope somebody can help me


Message Edited by Timmo on 2008-10-21 11:13 AM

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