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Problem migrating from i.MX6 Dual Lite to Quad

Question asked by Andrew Pines on Mar 9, 2018
Latest reply on Mar 9, 2018 by igorpadykov

We have a board in production which uses a Dual Lite (MCIMX6U5DVM10AC).  The boards are strapped to boot via SD Card and are functioning normally.  For a future project we built three with a Quad (one with a MCIMX6Q5EYM12AD, two with a MCIMX6Q5EYM10AD).  We did not make any other changes to the board.  Both the main and RTC oscillators run but the boards do not boot.  JTAG (via a SEGGER j-link) connects correctly on the Dual Lite.  On the Quads it seems to correctly identify the internal JTAG devices and their correct IDs but then it fails to connect.  Note that the Quads that we use have a different die revision than the Dual Lites.  In theory this shouldn't make any difference but we have had some issues with different die versions of the i.MX6 Ultra Lite in the past so we aren't ready to completely dismiss this possibility.  For further comparison we tried it with a Wandboard Quad (MCIMX6Q5EYM10AC -- note this also has the earlier die revision) and it worked fine.  The output from JLinkExe is below for both our board with a Quad (AD) and the Wandboard Quad (AC).

 

In both the Dual Lite and Quad on our board VDDARM_IN is connected to VDDARM23_IN (1.35V, pins H14, J14, K9, K14, L9, L14, M9, M14, N9, N14, P9, P14, R9, R14, T9, and U9) and VDDARM_CAP is connected to VDDARM23_CAP (H11, H13, J11, J13, K11, K13, L11, L13, M11, M13, N11, N13, P11, P13, R11, and R13).

 

Any insights as to what may be causing these issues would be appreciated.

 

   -Andrew

 

 

Output from JLinkExe when starting the Quad version of our board:

 

J-Link>connect

Please specify device / core. <Default>: MCIMX6Q5

Type '?' for selection dialog

Device>

Please specify target interface:

  J) JTAG (Default)

  S) SWD

TIF>

Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect

JTAGConf>

Specify target interface speed [kHz]. <Default>: 4000 kHz

Speed>

Device "MCIMX6Q5" selected.

 

 

Connecting to target via JTAG

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: ?, Unknown device

 #2 Id: 0x2191C01D, IRLen: ?, Unknown device

ARM AP[0]: 0x44770001, AHB-AP

ARM AP[1]: 0x24770002, APB-AP

ROMTbl[0][0]: CompAddr: 82141000 CID: B105900D, PID:04-003BB907 ETB

ROMTbl[0][1]: CompAddr: 82142000 CID: B105900D, PID:04-002BB906 ECT / CTI

ROMTbl[0][2]: CompAddr: 82143000 CID: B105900D, PID:04-004BB912 TPIU

ROMTbl[0][3]: CompAddr: 82144000 CID: B105900D, PID:04-001BB908 CSTF

ROMTbl[0][4]: CompAddr: 8214F000 CID: B105100D, PID:04-000BB4A9 ROM Table

ROMTbl[1][0]: CompAddr: 82150000 CID: B105900D, PID:04-000BBC09 Cortex-A9

Found Cortex-A9 r2p10

6 code breakpoints, 4 data breakpoints

Debug architecture ARMv7.0

TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: ?, Unknown device

 #2 Id: 0x2191C01D, IRLen: ?, Unknown device

 

****** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers.

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: ?, Unknown device

 #2 Id: 0x2191C01D, IRLen: ?, Unknown device

TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: ?, Unknown device

 #2 Id: 0x2191C01D, IRLen: ?, Unknown device

Cannot connect to target.

J-Link>

 

 

Output from JLinkExe when connecting to the Dual Lite version of our board:

 

J-Link>connect

Please specify device / core. <Default>: MCIMX6Q6

Type '?' for selection dialog

Device>MCIMX6U5

Please specify target interface:

  J) JTAG (Default)

  S) SWD

TIF>

Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect

JTAGConf>

Specify target interface speed [kHz]. <Default>: 4000 kHz

Speed>

Device "MCIMX6U5" selected.

 

 

Connecting to target via JTAG

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: 05, Unknown device

 #2 Id: 0x1891A01D, IRLen: 04, JTAG-DP

Scanning AP map to find all available APs

AP[3]: Stopped AP scan as end of AP map has been reached

AP[0]: AHB-AP (IDR: 0x44770001)

AP[1]: APB-AP (IDR: 0x24770002)

AP[2]: JTAG-AP (IDR: 0x14760010)

Iterating through AP map to find AHB-AP to use

AP[0]: Skipped. Not an APB-AP

AP[1]: APB-AP found

ROMTbl[0][0]: CompAddr: 82141000 CID: B105900D, PID:04-003BB907 ETB

ROMTbl[0][1]: CompAddr: 82142000 CID: B105900D, PID:04-002BB906 CTI

ROMTbl[0][2]: CompAddr: 82143000 CID: B105900D, PID:04-004BB912 TPIU

ROMTbl[0][3]: CompAddr: 82144000 CID: B105900D, PID:04-001BB908 CSTF

ROMTbl[0][4]: CompAddr: 8214F000 CID: B105100D, PID:04-000BB4A9 ROM Table

ROMTbl[1][0]: CompAddr: 82150000 CID: B105900D, PID:04-000BBC09 Cortex-A9

Found Cortex-A9 r2p10

6 code breakpoints, 4 data breakpoints

Debug architecture ARMv7.0

Data endian: little

Main ID register: 0x412FC09A

I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way

D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way

System control register:

  Instruction endian: little

  Level-1 instruction cache enabled

  Level-1 data cache enabled

  MMU enabled

  Branch prediction enabled

Cortex-A9 identified.

J-Link>

 

 

Output from JLinkExe when connecting to a Quad Wandboard (MCIMX6Q5EYM10AC):

 

J-Link>connect

Please specify device / core. <Default>: MCIMX6Q5

Type '?' for selection dialog

Device>

Please specify target interface:

  J) JTAG (Default)

  S) SWD

TIF>

Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect

JTAGConf>

Specify target interface speed [kHz]. <Default>: 4000 kHz

Speed>

Device "MCIMX6Q5" selected.

 

 

Connecting to target via JTAG

TotalIRLen = 13, IRPrint = 0x0101

 

**************************

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

 

**************************

 

JTAG chain detection found 3 devices:

 #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP

 #1 Id: 0x00000001, IRLen: ?, Unknown device

 #2 Id: 0x2191C01D, IRLen: ?, Unknown device

ARM AP[0]: 0x44770001, AHB-AP

ARM AP[1]: 0x24770002, APB-AP

ROMTbl[0][0]: CompAddr: 82141000 CID: B105900D, PID:04-003BB907 ETB

ROMTbl[0][1]: CompAddr: 82142000 CID: B105900D, PID:04-002BB906 ECT / CTI

ROMTbl[0][2]: CompAddr: 82143000 CID: B105900D, PID:04-004BB912 TPIU

ROMTbl[0][3]: CompAddr: 82144000 CID: B105900D, PID:04-001BB908 CSTF

ROMTbl[0][4]: CompAddr: 8214F000 CID: B105100D, PID:04-000BB4A9 ROM Table

ROMTbl[1][0]: CompAddr: 82150000 CID: B105900D, PID:04-000BBC09 Cortex-A9

Found Cortex-A9 r2p10

6 code breakpoints, 4 data breakpoints

Debug architecture ARMv7.0

Data endian: little

Main ID register: 0x412FC09A

I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way

D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way

System control register:

  Instruction endian: little

  Level-1 instruction cache enabled

  Level-1 data cache disabled

  MMU disabled

  Branch prediction enabled

 

 

*** J-Link V6.20g J-Link V6.20g Warning ***

You are using a J-Link which does not have intelligence

for the selected CPU core (Cortex-A9) in the firmware.

 

Intelligence in the firmware enables J-Link

to generate sequences for the CPU core.

Without this feature, all sequences are generated by the PC.

 

Intelligence in the firmware allows higher target interface speeds

and significantly enhances both speed and stability of the

communication with the target CPU.

 

You can use this J-Link with your target CPU, but we recommend

using a newer model of J-Link / J-Trace.

*** J-Link V6.20g J-Link V6.20g Warning ***

 

Cortex-A9 identified.

J-Link>

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