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GPIO state in S32K14X low power VLPS mode

Question asked by Sreenivasulu vaka on Mar 8, 2018
Latest reply on Mar 9, 2018 by Daniel Martynek

I have question related to S23K14X low power mode VLPS . NXP application note AN5425( Power Management for S32K14x ), table 4 mentions that GPIO/PORT module is off in VLPS mode. What does “off” mean ?  Does it mean that the Micro can’t ( or keep the pin at a desired  level ) drive  a port pin  in VLPS mode?  If yes, what is the state of GPIO pins in VLPS mode? We are basically trying to confirm whether we can assert( either high or low) certain GPIO pins in VLPS mode in order to reduce quiescent current.