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LPC11U68 secondary bootloader MTB conflicts with ram vectors?

Question asked by David Kaplan on Mar 5, 2018
Latest reply on Jun 18, 2018 by jeremyzhou

I created a secondary bootloader for the LPC11U68 chip which jumps to our main program at 0x4004.

In the main program I copy the interrupt vectors to an array set to a ram array set to be located at vtable.

  int32_t vector_in_ram[AQUA_CPU_INTERRUPTS] __attribute__ ((section ("vtable")));

I then set the interrupts to be used from the ram.

  LPC_SYSCTL->SYSMEMREMAP = 0x1;

 

My problem is that the LPC11U68 chip maps the MTB trace in the local SRAM starting at address 0x1000 0000.

The vtable is located by the link script to 0x10000300 whereas for my use it should be at the MTB trace address.

 

"When the MAP bits in the SYSMEMREMAP register are set to 0x0 or 0x1, the boot
ROM or RAM respectively are mapped to the bottom 512 bytes of the memory map
(addresses 0x0000 0000 to 0x0000 0200)."

 

How can I disable the MTB trace in release code and change the link script just to remove it leaving everything else as is?

 

In my project Preprocessor defines there is __MTB_BUFFER_SIZE=256.

I removed it and recompiled but it did not help.

Thanks

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