Internal Voltage Regualtor mishap - MC9S12DG128 added p/n to subject.

[danazari]

Hello,

I am hoping that someone can explain the damaged caused by applying 5VDC to VDD1,VDD2, and VDDPLL while the Internal Voltage Regulator is enabled.  On a small run of a project using an MC9S12DG128 with Pierce osc configuration we incorrectly supplied 5VDC to the internal voltage regulator filter pins.  These boards all worked properly upon intial programming.  However, we have had a high failure rate in the field with processors failing to start or unreliably starting after several weeks of use.  I suspect the problem is damage to the silicon and VCO circuitry and would appreciate some expert opinions.

On one such processor that failed in the field I have noticed the following--

With 5VDC still applied to VDD1, VDD2 and VDDPLL the unit boots in the lab, and I am able to use a BDM debugger.

When I disconnected 5VDC from these pins and placed 100nf caps, all three outputs measure 2.5VDC.  However, the oscillator does not appear to start correctly and I can not connect with a BDM pod.  The mcu will only start if 5VDC is aplied to all three of these pins.

On a new design with this problem corrected, mcu boot normall using identical components on the oscillator and vco, so I suspect that the unit above does have some damage to the silicon.

Thanks in advance,

Dan

Added p/n to subject.

Message Edited by NLFSJ on 2008-10-20 10:29 AM

[DPB]

Hello

The absolute maximum rating for VDD1, VDD2 and VDDPLL is 3V.
Application of voltages exceeding 3V to these pins can cause irreparable damage.

Typically voltages exceeding 3V at these pins cause gate oxide breakdown, particularly if applied for any length of time. This can occur at the oscillator in the VDDPLL domain or in internal logic in the VDD1, VDD2 domain, whereby a breakdown in the internal logic domain may not be immediately apparent if it damages transistors that are not used in the application.

Since the devices are specified with margin, it is possible that some parts withstand a voltage of 5V for
several days, however eventually a gate breakdown will occur. For this reason it is strongly recommended to never apply higher voltages to these pins, not even in a lab environment.

DPB

[Lundin]

I'm far from a pro on the innards of the S12, but I know that the internal voltage is 2.5V. If you put 5V to the internal voltage pins VDD1 and VDD2 (which are for decoupling caps only), it would most likely blow a good number of internal diodes in the mcu, ie silicon damage.

It would be interesting to hear what the Freescale gurus say about this matter though. You could always post a service request about it.