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Problem with Timer0 in LPC1769

Question asked by Vytautas C. on Mar 2, 2018
Latest reply on Mar 6, 2018 by Vytautas C.

I configure MR0 = CLOCK*500-1 and MR3 = CLOCK*1000-1 [CLOCK is the cpu frequency in MHz, which in my case is 100]. PR=0. Thus, MR0 corresponds to 0.5ms and MR3 to 1ms, that is the time until match.


I then configure MCR to interrupt on MR0 and to reset counter on MR3.


I should get an interrupt periodically every 0.5ms because of MR0, BUT I get interrupt every 1 ms [precisely; I can vary MR0 and MR3 values, but interrupt always happens on the period according to the MR3 value]. What might be explanation of such behavior?