T1040 board change eht phy chip

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T1040 board change eht phy chip

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diniu
Contributor I

Hi, Our t1040 board have different eth phy chips from t1040rdb, Now the u-boot can work, but the eth does not work. According u-boot output as following:

Board: T1040RDB
Board rev: 0xff CPLD ver: 0xff, vBank: 7
I2C: ready
SPI: ready
DRAM: Detected UDIMM Tigo-1600MHz-2G
Not enough bank(chip-select) for CS0+CS1 on controller 0, interleaving disabled!
2 GiB (DDR3, 64-bit, CL=11, ECC off)
L2: 256 KiB enabled
Corenet Platform Cache: 256 KiB enabled
Using SERDES1 Protocol: 142 (0x8e)
SERDES1[PRTCL] = 0x8e is not valid
MMC: FSL_SDHC: 0
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
PCIe1: disabled
PCIe2: disabled
PCIe3: disabled
PCIe4: disabled
In: serial
Out: serial
Err: serial
Net: Initializing Fman
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
Fman1: Uploading microcode version 107.4.2
No ethernet found.
Hit any key to stop autoboot: 0
=> mdio list
FSL_MDIO0:

What should I do? 

Regards.

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Pavel
NXP Employee
NXP Employee

Check Ethernet setting in the .dts file for your board. This file is available using the following path in SDK 2.0-1703:

QorIQ-SDK-V2.0-20160527-yocto/build_t1042d4rdb/tmp/work/t1042d4rdb-fsl-linux/linux-qoriq/4.1-r0/git/arch/powerpc/boot/dts/fsl


Have a great day,
Pavel Chubakov

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