AnsweredAssumed Answered

IMX6ULL GPU initialization problem - pan flip timeout

Question asked by mat kattanek on Feb 26, 2018
Latest reply on Feb 27, 2018 by igorpadykov

Using an ILI9341 320x240 lcd display in 8bit RGB interface mode with an IMX6ULL. The display is initialized once over SPI at U-boot startup, where the NXP logo is successfully displayed. On kernel boot (4.9.11) all that needs to be done now is setting up the GPU (mxsfb.c) again. This again works nicely as the Penguin is displayed and shortly after I see the console prompt.

 

Here is my problem: Occasionally I see awhite LCD screen. Meaning the penguin is not showing and console prompt either. The initial U-boot though was successful, since the NXP logo got displayed. Only way out at this point is to reboot.

 

Looking at the driver initialization I noticed that one control register (lcdif_ctrl1n) is set differently in the 'failure' case:

 

   Bit 8 and bit 9 show IRQ pending  for VSYNC_EDGE_IRQ and CUR_FRAMEDONE_IRQ.

 

in this case some thing seems to go wrong. ( my guess is that the GPU hangs at this point) and the driver initialization

run into a problem and I see the follwoing msg twice:

 

   mxsfb 21c8000.lcdif: mxs wait for pan flip timeout

 

and I end up with a 'white' non working display.

 

Another thing I came to notice was that the mxsfb.c::mxsfb_set_par() is run twice at initialization. This always happen in the 'good' and 'failure' case.  In the 'failure' case though the second mxsfb_set_par() run shows the IRQ pending.

 

Is there a possible race condition? Why is mxsfb_set_par() run twice? is that needed?

Anybody experienced similar problem and able to share some more light on this?

 

Mat

Outcomes