we've used "I.MX6Q DDR3 Script Aid V0.10.xlsx" to generate register settings for the iMX6Q and four MT41K128M16JT-125 in u-boot (using DDR3-1066 and its timings) for a custom board. The Script Aid suggests among other values:
- MMDCx_MDCFG0 (0x021b000c): 0x545979A4 (where the '4' stands for CL 7)
- MMDC0_MDSCR (0x021b001c; set MR0): 0x19308030 (where the first '3' stands for CL 7)
This doesn't work, though -- I get R/W errors and u-boot doesn't even come up after setting the board up using JLink. What makes it work is to increase the CL in MMDC0_MDSCR (0x19408030; CL 8) or to decrease the CL in MMDCx_MDCFG0 (0x545979A3; CL 6). It doesn't matter as long as the CL for the DDR3 is greater than the CL for the iMX6Q by one! This is a little irritating. Can anyone imagine what could be the reason for this behaviour? I would have assumed that the CAS read latencies should be the same for iMX6Q and DDR3, and that's what pretty much all boards in u-boot are configuring, except one.
BTW: The calibration values may also not be the default values of 0x00000000 and 0x40404040, respectively. Maybe that's related?