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We implemented A/D reading but had issues with the resulting readings

Question asked by Mark Scovel on Feb 23, 2018
Latest reply on Feb 25, 2018 by xiangjun.rong
We've found that running the K65 A/D at bus clock speed appears to fail in obtaining the full 16 bits of the sample, where for a given constant voltage input, the ADC would report two values with ~240 counts difference, and no values in between.  For instance, back to back readings might be 20,400 and 20,640 for a constant voltage.
 
However, if we divide the A/D clock by 4 or 8 (slow down the A/D clock) that problem is resolved yet we don't see any documentation that tells us we need to do that. We want to find the optimum settings but fear we're not looking in the right place to know for sure what those settings are. 
 
Can you advise about how to achieve the max accuracy at max speed?
Any help you can provide is very much appreciated!

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