Paul Sweezie

Intermittent reset failures on 5282

Discussion created by Paul Sweezie on Oct 16, 2008
Latest reply on Oct 25, 2008 by Paul Sweezie
We are experiencing seemly random POR reset failures. There 3 different scenarios: 1) the board boots and runs properly; 2) board does not run and we see a finite (typically a burst of 4 pairs followed by a burst of 5 pairs) number of CS0* assertions; 3) board does not run and we see continuous toggling of CS0*. The scenarios occur in bunches. ie. it will work 5-6 times in a row then it will fail 5-6 times in a row. Our reset config pins specify an external, 16 bit boot and we have our boot loader stored in flash. All of the reset config pins seem correct, we just tried using a buffer for the ones shared with the data bus but it did not change the behaviour. Our actual board just uses pullups/pulldowns. We see the same two failing scenarios if our boot flash is erased. Can somebody please explain why (or point me to an explanation) we would see continuous toggling on CS0* with an erased boot flash? The clockout frequency is as expected. The time between RSTI de-assertion and RSTO de-assertion is as expected. Any suggestions on what I should look for next? Thanks

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