I have been through ls1043a-rdb documentation to find out how are set Inner and Outer shareable domains.
- QorIQ LS1043A Reference Manual
- QorIQ LS1043A Reference Design Board Reference Manual
- QorIQ LS1043A Reference Design Board Quick Start
I also found in ARM documentation that this division is implementation defined:
- ARM Information Center > 13.3.1. Cacheable and shareable memory attributes
I would like to know for each component to which domain it belongs. Moreover I am not sure of the implementation type: is the domains definition implemented in hardware or is there a way to configure it in software, perhaps at boot step?
Does someone know where I can find these information?