I have a new question that's related to a PCIe Master Abort question I asked a while ago (unanswered).
We have a situation where a PCIe endpoint resets unexpectedly and when our P4080 (that's RC) tries to read something from that endpoint we get completion Time outs and Acknowledge time out (not sure why, isn't it enough with the CTO?).
If we stop with the accesses at that point the CPU can continue to execute but if we don't we get a machine check and the CPU crashes.
It's like the CPU/PCIe controller only can handle a few errors.
Is it like that or what is it we're seeing?
Are we expected to do something else?