I am having problems with the T2080 CPU with relation to the JTAG 1149.6 testing.
I have looped back some of the serdes signals and when I run the test the T2080 does not receive them.
the T2080 also goes to an FPGA and PEX device, when I transmit from the T2080 to either the FPGA or PEX the tests pass, but if I then transmit from either the FPGA or PEX to the T2080 the test fails.
I have sent the command to configure the IO-CONFIG register as per the instructions in the BSDL file, but this does not improve things.
has any one had a similar experience?