We are using PN5180 on Linux based custom board used for payment applications.
Using example applications, we see that there are around 3 sec delay between some of the transactions.
We use Bal driver from https://github.com/NXPNFCLinux/nxprdlib-kernel-bal and SW3693-1 package from NXP as reader library.
One of the obvious problems I see with BAL driver is, it registers for only Falling edge of busy line.
status = request_threaded_irq(bal.busy_irq, bal_busy_isr,
For the first transaction, Bal_write will not wait for busy line and goes ahead and performs SPI write, but for next transaction, it will wait for 3 secs as the timeout for completion in bal_write is 3 secs. The only possible way to avoid this 3 seconds is, if data is fed continuously and PN5180 completes write/read transaction and brings down busy line in this 3 secs waiting time of next write/read.
Is this how it was designed?
Shouldn't driver hold the status of busy line by registering for both IRQF_TRIGGER_FALLING and IRQF_TRIGGER_RISING and read the busy line (as most likely it will be connected to GPIO) and keep track of busy line status. Go to wait in read/write only if busy line is high.