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iMX8- low power/deep sleeping mode

Question asked by Boris Berman on Feb 15, 2018
Latest reply on Feb 19, 2018 by Boris Berman


Our new project on basis  iMX8m, should include low power/deep sleeping mode with desired power consumption less than 10 mW

For its implementation we intend to provide  followings steps:

        1.  To set PIMIC in Sleeping Mode (deasserted   PMIC_ON_REQ signal from iMX8M to PWRON pin of PIMIC), so                that only the power for the SNVS domain remains on for iMX8M. ( according to data sheet this mode called                       SNVS Mode, see paragraph 3.1.6)

        2.  To set DDR Memories in the Self Refresh Mode.

       3.  iMX8M will be wake Up from low power/deep sleeping mode through ONOF signal, and after this it will assert                  PMIC_ON_REQ   signal  for PIMIC

Please confirm that iMX8M support those steps, and  after wake-up from SNVS Mode it will be able to continue programs from the same point without the system reset.


Thank You,