we're building our own hardware based on an i.MX6DL and recently ran into a PCIe issue, which is accurately described here (our Kernel version is v4.1.15, though). The work-around proposed in one of the following entries of this thread (i.e. clear the PCIe-related flags in GPR1 and GPR12 in the bootloader; see here) appears to fix this issue.
Can you confirm that this is a valid work-around?
Furthermore, this raises the question if there are any other registers or components in the SoC that are not cleared/reset after a WDG reset as opposed to a POR.
Can you provide some information on that?