Hi,
I am using IMX7 with Yocto Linux. I built the BSP, loaded on SD card and run.
After linux booted, following info regarding PCIE appears on Terminal:
33800000.pcie supply pcie-bus not found, using dummy regulator
imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io 0x1000-0xffff]
pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fefffff]
pci_bus 0000:00: root bus resource [bus 00-ff]
PCI: bus0: Fast back to back transfers disabled
PCI: bus1: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x400fffff]
pci 0000:00:00.0: BAR 8: assigned [mem 0x40100000-0x401fffff]
pci 0000:00:00.0: BAR 6: assigned [mem 0x40200000-0x4020ffff pref]
pci 0000:01:00.0: BAR 0: assigned [mem 0x40100000-0x40101fff 64bit]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0: bridge window [mem 0x40100000-0x401fffff]
pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt
pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
When I run lspci, then it appears as follows because I have currently connected a WIFI module for test:
00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01)
01:00.0 Network controller: Intel Corporation Wireless 8260 (rev 3a)
and when I run menuconfig command bitbake linux-phytec-fsl -c menuconfig
the PCIE kernel is also already selected as seen here:
[*] PCI support │ │
│ │ [*] Message Signaled Interrupts (MSI and MSI-X) │ │
│ │ [ ] PCI Debugging │ │
│ │ [ ] Enable PCI resource re-allocation detection │ │
│ │ < > PCI Stub driver │ │
│ │ [ ] PCI IOV support │ │
│ │ [ ] PCI PRI support │ │
│ │ [ ] PCI PASID support │ │
│ │ PCI host controller drivers ---
-*- PCI Express Port Bus support │ │
│ │ [*] Root Port Advanced Error Reporting support │ │
│ │ [ ] PCI Express ECRC settings control │ │
│ │ < > PCIe AER error injector support │ │
│ │ [*] PCI Express ASPM control │ │
│ │ [ ] Debug PCI Express ASPM │ │
│ │ Default ASPM policy (BIOS default) ---> │ │
│ │ < > PCCard (PCMCIA/CardBus) support ----
Now my aim is to send/receive data over PCIE to a XILINX kintex 7 FPGA.
What I didn't understand while running some application C code on IMX7, how it knows that the data is supposed to be transfer over PCIE. DO I need to include something in my application c code corresponding to PCIE, so that it knows that the transfer occur over PCIE and not over other interface?
one more thing when linux booted, it appears on Terminal always at the end:
random: nonblocking pool is initialized
What is that mean?
Regards
