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I2C specification question

Question asked by Jerry Chien on Feb 6, 2018
Latest reply on Feb 12, 2018 by David Diaz Marin

Dear Sir / Madam,



I have a few questions, and I hope some which can help me interpret the I2C bus specification.

The I2c specification shows a SDA/SCL slope control – rising /falling time for 400KHz speed (Fast Mode) as 20nS + Cb*0.1 [ where Cb is bus capacitance] , which is shown as attachment(red square).

I would like to know:

  1. 1. What is the intention for this parameter? Why it's on the 400kHz bus speed requirement but not on the 100kHz?
  2. 2. What will be happened if tr/tf smaller than 20ns on the 400KHz bus speed requirement?




Thank you,