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DTCM/ITCM Aliasing? (KV5X)

Question asked by lsrbigfoot on Feb 2, 2018
Latest reply on Feb 12, 2018 by Chris Brown

While using the K20/K22 (cortex-M4), I have been using bit-banding macros to access the aliased region for SRAM_U (0x20000000 to 0x2000FFFF).


Example Macro:
#define BandAddr 0x22000000
#define BitBandMem(Addr, Bit)     (*(volatile uint32_t*)(BandAddr + ((((uint32_t)Addr) & 0x3FF) << 5) + (((uint8_t)Bit) << 2)))


Does the KV5X (Cortex-M7) support bit-banding to both ITCM and DTCM memories (D0TCM and D1TCM) if I were to use similar macros?