AnsweredAssumed Answered

LPSPI PCS behavior on RT105x

Question asked by Ryan Shuttleworth on Feb 2, 2018
Latest reply on Feb 28, 2018 by Hy Mai

Hello, I am using IAR with an RT1050 SDK, version  2.3.0 (2017-11-16).  I am having a strange issue with the LPSPI chip select (PCS) when sending data.  I am trying to achieve what I would call ideal CS behavior and that is:


  • Chip select should drop
  • 5 words should get clocked out and chip select should not rise between words
  • Chip select should rise after the last word is clocked


So far the only way I have been able to achieve this is demonstrated with the following simple example (which seems a bit silly)





masterConfig.baudRate = pCtx->baudRate;
masterConfig.bitsPerFrame                  = 16;
masterConfig.cpol                          = kLPSPI_ClockPolarityActiveHigh;
masterConfig.cpha                          = kLPSPI_ClockPhaseSecondEdge;
masterConfig.direction                     = kLPSPI_MsbFirst;
masterConfig.pcsToSckDelayInNanoSec        = 100;
masterConfig.lastSckToPcsDelayInNanoSec    = 100;
masterConfig.betweenTransferDelayInNanoSec = 0;
masterConfig.whichPcs                      = kLPSPI_Pcs0;
masterConfig.pcsActiveHighOrLow            = kLPSPI_PcsActiveLow;

LPSPI_MasterInit(LPSPI3, &masterConfig, LPSPI_CLOCK_FREQ);




/*! Just a low-overhead LPSPI TX routine */
#define RAW_LPSPI_TX(spi, pBuf, n)     \
    do {                               \
        for (int _i = 0; _i < n; _i++) \
        {                              \
            spi->TDR = pBuf[_i];       \
        }                              \
    } while (0)

for (i = 0; i < 5; i++)

     RAW_LPSPI_TX(LPSPI3, buf, 5);

It seems I have to begin the transaction in one mode and terminate with another.  If I don't do the above wrapping I either get chip select rises between words or a chip select that will drop but never rise once the words are transmitted.  I have seen a similar issue in this post


Could someone please recommend a setup that can be performed once and have LPSPI CS behave "ideally" from then on?