i am genrating delay using PIT timer 1 in both core 0 and core 1. PIT timer working in core 0 successfully but in core 1 PIT timer is not working.
i also configured INTC_PSR regiester as shown below where i select interrupt request send to both processors.
but interrupt is generated only in core 0 not in core 1.
i also changes priority of interrupt in both core 0 and core 1 but its not working.
i also check by using PIT timer in core 0 and PIT timer 2 in core 1 but its also not working.
So can you please check that why interrupt is not generated in core 1. and also check that we can use PIT timer in core 1 or not?
here is code for initialization of PIT timer 1
/* LDVAL = peripheral clock -1 i.e peri_clck = 96MZ
* creates time interval of 500msec
PIT.TIMER.LDVAL.R = 192-1; //Timer Start Value
PIT.TIMER.TFLG.R = 0x00000001; //clear the TIF flag
PIT.TIMER.TCTRL.B.TIE = 1; //Interrupt will be requested whenever TIF is set
PIT.TIMER.TCTRL.B.TEN = 1; // start Timer