Our objective is to analyze the timing performance of the M4 with FreeRTOS, having Linux in the A7. Therefore, we think that a interest test is to stress the DDR from Linux and to see if the M4 tasks using DDR suffers any latency. However, we have seen some weird things.
- Is it possible to know the bus utlization? Is there any counter for that? I know that in the iMX6 there was a MMDC Profiling Tool that calculate that.
- It will interesting to have a detailed Architectural Block Diagram. The one in the Reference Manual is tto simple to know the Bus connections. Is there anyone available?
How does the AXI bus manage the priorities? The M4 has the higher priority? If the A7 and M4 try tio write in the DDR at the same time, which one has priority?