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External Ref clock for PCIE Gen.2

Question asked by adi avraham on Jan 31, 2018
Latest reply on Feb 1, 2018 by adi avraham



The are so many topics regarding this issue, but I don't find the answer in any of them.

In IMX6, is the CLK1/CLK2 pins configured as input Ref clock for the PCIE are LVDS compatible or HCSL compatible?

Where can I find the electrical specifications of the input (common mode, dif inut swing,VIH,VIL)?