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IMX6 SPI Native Chip Select

Question asked by Parag Rao on Jan 31, 2018
Latest reply on Jan 31, 2018 by igorpadykov

Hello ,

 

We are trying to enable Native Chip Select for IMX6 UL Processor.

We are able to communicate with Slave device by configuring the IMX6 as master using GPIO Chip select.

But when we change the DTS configuration and Period register accordingly we do not see any response from Slave device.

I have a query: What is the function of "Hardware Trigger and Hardware Trigger Length " in IMX6UL ?

Is it related with Native chip select assertion timing ?

As there is very little description, i would request if someone can put some useful information and let me know if any issues operating IMX6UL SPI in native chip select mode.

 

Thanks,

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