The spec sheet for the MPC5777C says the SDADC has a SNR of 80dB when operated in differential mode with a gain=1 and 150Ksps (page 27 of the spec sheet). Does this 80dB include the fact that one bit is required for sign? How would one calculate the effective noise free resolution and the LSB size in this scenario?
For example, the converter provides 16 bits for every conversion. However the SNR is 80dB which can be shown to be equivalent to 14bits. Therefore the last two bits are in the noise of the SDADC... correct? Does this 80dB also include the fact that one bit is required for sign in the differential mode, or will the 80dB/14bits be further reduced due to the need for a sign bit?
My interpretation of the specs is that 80dB=14bits effective noise free resolution. Therefore the last two bits of the 16bit conversion can be ignored since they are within the noise floor of the converter. If I have a 5V Vref in this situation, my effective noise free LSB size would be 5V/2^14 = 305uV/LSB. Correct?
Essentially I have a differential signal that will never go negative and I want to understand what sort of effective noise free resolution and LSB size I can expect from this SDADC.
