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CLUT

Question asked by Denis ZALLOT on Jan 25, 2018

Good morning,

Our application on the MPC5645S is working fine. Now, we would like to implement a CLUT.

  • In the CtrlDescL0-4 register, we write 0x0000 (start of the CLUT RAM) inside the LUOFFS field and 0x2 inside the BPP field
  •  We enter our 16-word CLUT from address 0x0000 of the CLUT RAM. (that itself begins at offset 0x2000)

This does not work. When we use the debugger, we notice that the CLUT RAM is being written into by the DCU. This is not at all normal.The CLUT should not be modified in any way while the program is running. Has anybody have an explanation of the cause of this problem?

 

It is surprising that we do not specifically select the CLUT mode. We suspect this is selected indirectly by the BPP field of the CtrlDescL0-4 register. Can you confirm?

 

Please, when we select in the DCU mode register the value 2 in the the DCU mode field (Test mode), what should we have on the screen ? The color selected by the first entry of the CLUT table of all the active layers?

 

 

 

Thank you

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