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In T1024 based design, what are the scenarios when RESET_REQ_B is asserted and PORESET_B, HRESET_B is de-asserted?

Question asked by Shalaka Shinde on Jan 24, 2018
Latest reply on Jan 24, 2018 by ufedor

In T1024 based design, what are the scenarios when RESET_REQ_B is asserted and PORESET_B, HRESET_B is de-asserted?

I have a design, where PORESET_B and HRESET_B both are at high logic.

Only RESET_REQ_B is low.

 

I am not able to load RCW to NOR flash.

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