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Multibank DDR3 Interface!

Question asked by Qammar Abbas on Jan 24, 2018
Latest reply on Jan 24, 2018 by ufedor

Hi,

I am interfacing 2 banks of DDR3L devices with T1042 processor. At this stage, i have got some schematics for reference but all of them either use a single bank or they use registered DIMMS. Can anybody please provide a schematic having multiple banks? I want to see how are the different groups (Address, Command, Control) terminated.

Thank you!

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