rasit yilmaz

K64F SPI Problem

Discussion created by rasit yilmaz on Jan 21, 2018
Latest reply on Sep 26, 2018 by rasit yilmaz

Hi I am newbie for embeded programming and ı have problem with spi I am trying to write basic spi to see going datas  with logic analyzer but as ı see data not going. if you can help me where is the problem ı will  be happy. 

My code is here : 

 

#include "MK64F12.h"

void initspi();
#define SPI_PUSHR_PCS0_ON 0x10000
#define SPI_CTAR_FMSZ_8BIT 0x38000000
void initspi(){
SIM_SCGC5 |= SIM_SCGC5_PORTD_MASK; // PortD clock --SPI CONNECTIONS-- OK!
SIM_SCGC6 |= SIM_SCGC6_SPI0_MASK; // SPI0 Module Clock OK!
//Pin Muxing..
PORTD_PCR0 |= PORT_PCR_MUX(2); // SPI0 SS
PORTD_PCR1 |= PORT_PCR_MUX(2); //SPI0_SCK
PORTD_PCR2 |= PORT_PCR_MUX(2); //SPI0_SOUT
PORTD_PCR3 |= PORT_PCR_MUX(2); //SPI0_SIN
//Clear All Bits
SPI0_SR = (SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK); //clear the status bits (write-1-to-clear)
SPI0_TCR = 0;
SPI0_RSER = 0;
SPI0_PUSHR = 0; //Clear out PUSHR register. Since DSPI is halted, nothing should be transmitted
SPI0_CTAR0 = 0;
//SPI_MCR
SPI0_MCR |= SPI_MCR_MSTR_MASK; // Set Master.
SPI0_MCR &= ~SPI_MCR_CONT_SCKE_MASK; // Continuous SCK Disable
SPI0_MCR &= ~SPI_MCR_FRZ_MASK; // Do not halt serial transfers in Debug mode
SPI0_MCR |= SPI_MCR_PCSIS_MASK; //The inactive state of PCSx is high.
SPI0_MCR &= (~SPI_MCR_DIS_RXF_MASK & ~SPI_MCR_DIS_TXF_MASK); // enable FIFOs
//CTAR Settings
SPI0_CTAR0 &= ~SPI_CTAR_DBR_MASK; // DBR 0
SPI0_CTAR0 |= SPI_CTAR_FMSZ_8BIT; // 8bit(7+1)
SPI0_CTAR0 |= SPI_CTAR_PBR(0); // Baud Rate Prescaler value is 2.
SPI0_CTAR0 &= ~SPI_CTAR_CPOL_MASK; // CPOL 0
SPI0_CTAR0 &= ~SPI_CTAR_CPHA_MASK; // CPHA 0
SPI0_CTAR0 |= SPI_CTAR_BR(6); //500khz at 60Mhz  = > 468.75Khz 

}
int main(void)
{
initspi();
SPI0_MCR |= (SPI_MCR_CLR_RXF_MASK | SPI_MCR_CLR_TXF_MASK); //flush the fifos
SPI0_SR |= (SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK); //clear the status bits (write-1-to-clear)
SPI0_TCR |= SPI_TCR_SPI_TCNT_MASK;
SPI0_MCR &= (~SPI_MCR_MDIS_MASK & ~SPI_MCR_HALT_MASK); //enable SPI and start transfer
while(1){
SPI0_PUSHR = 0x2d;
while(!(SPI0_SR & SPI_SR_TCF_MASK));
SPI0_SR |= SPI_SR_TFFF_MASK; //clear the status bits (write-1-to-clear)
}
return 0;
}

 

 

Thank you for any help and idea 

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