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How to enable IPU with LCD QVGA TFT in iMX6

Question asked by Duc Minh Nguyen on Jan 18, 2018
Latest reply on Jan 24, 2018 by Duc Minh Nguyen

Hi everyone,

 

I am a student and now I have a project with iMX6S5 custom board and bare metal code from SDK 1.1. I try to setup and run simulation IPU with one TFT LCD QVGA 320x240 by RGB interface but not yet successful and I have some trouble:

- In file ipu_dc.c

If I enable PROG_CHAN_TYP to avoid image tearing as in the SDK:

      ipu_write_field(ipu_index, IPU_DC_WR_CH_CONF_5__PROG_CHAN_TYP_5, 4);

the function " ipu_enable_display(int32_t ipu_index) " can not call and I get error about memory fail to access and get stuck at IPU_IPU_CONF__DC_EN.

So if I disable it by write 0, ipu can enable but the screen is totally white and there is no Freescale Logo here.

- For RGB interface, do I really need the DRDY because my hardware the DI0_PIN15 is not connect with LCD.

 

I think maybe I make something wrong. I build the project in Eclipse with GNU ARM Toolchain then debug with Segger JLink under U-boot, program is loaded into RAM. Setting for my LCD is:

 

"Ampire QVGA", // name
Ampire_QVGA, // panel id flag
DISP_DEV_TFTLCD, // panel type
DCMAP_RGB666, // data format for panel
60, // refresh rate
320, // panel width
240, //panel height
6500000, // pixel clock frequency
93, // hsync start width
25, // hsync width
20, // hsyn back width
28, // vysnc start width
10, // vsync width
4, // vsync back width
0, // delay from hsync to vsync
0, // interlaced mode
0, // clock selection, internal
0, // clock polarity
0, // hsync polarity
0, // vync polarity
1, // drdy polarity
0, // data polarity

Other things I keep same as in the SDK 1.1.

Thanks and Best Regards.

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