GPIO access to FEC3 pins using UCC3/UART

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

GPIO access to FEC3 pins using UCC3/UART

764 Views
vangoethemfrédé
Contributor I

Hi,

I need some information's about IO configuration on MPC8309. On page 184/1048 of the datasheet (MPC8309RM), I can see the configuration details of SICR_2 register. Table 6-28 seems to indicate that IO's linked to FEC3 are no more configurable as GPIO if I use FEC3.

In my project, I use UCC3 as UART (Table 6-29, p185). This UART uses FEC3_RXD0, FEC3_TXD0, FEC3_TX_EN so I suppose that bits [0-1] of SICR_2 shall be configured as [0-0]. Does it mean that the other IO's associated to FEC3 are no more configurable as GPIO? In other words, is it possible to use UCC3 as UART and configure other pin's of FEC3 as GPIO?

This point is really critical in my project because I also use UCC1 and UCC2, also for UART's, and need many GPIO's.

Thanks for support.

Tags (1)
0 Kudos
3 Replies

630 Views
alexander_yakov
NXP Employee
NXP Employee

Please look MPC8309 Reference Manual, Table 6-28.

According to this table, all FEC3 related pins are managed by one "FEC3" field in SICR_2 register. So, you can either configure all these pins to FEC3 function, or to GPIO. Individual per-pin configuration is not possible.


Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

630 Views
vangoethemfrédé
Contributor I

Hi,

Thanks for support, we made corrections to avoid mixing IO and UART in one FEC. Regarding our design, we would like to have some support to check our CPU IO configurations. Is it possible with your team? or do you have “MCP8309 expert” contact to subcontract this work?

The idea would be to send a table with the different mux choices on CPU IO and to validate this table.

Many thanks,

F.Van Goethem

De : alexander.yakovlev

Envoyé : lundi 15 janvier 2018 06:41

À : VAN-GOETHEM Frederic

Objet : Re: - Re: GPIO access to FEC3 pins using UCC3/UART

NXP Community <https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>

Re: GPIO access to FEC3 pins using UCC3/UART

reply from alexander.yakovlev<https://community.nxp.com/people/alexander.yakovlev?et=watches.email.thread> in PowerQUICC Processors - View the full discussion<https://community.nxp.com/message/977198?commentID=977198&et=watches.email.thread#comment-977198>

0 Kudos

630 Views
alexander_yakov
NXP Employee
NXP Employee

Yes, you can request to perform schematic review for your schematic, we will check all connections around the processor. This request can be placed via your authorized distributor.


Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos